LOCATION
Oct 12,13:
Toyota Solarium
Oct 14, 15:
Paul Martin Centre
Wilfrid Laurier University
Waterloo, Ontario
TRAVEL &
ACCOMMODATIONS
Greyhound Canada
VIA
Rail
Comfort Inn
Campus
Map & Parking
Driving Directions
PROGRAM
Intro to High Performance Programming (bonus session)
Fall Workshop 2004
Call
for Posters
SPEAKERS
Susanne M. Balle
David Cownie
Edward Chrzanowski
Brian J. D'Auriol
Mike Dewar
Craig C. Douglas
Nikolas Provatas
Brian
Sumner
Rob Thacker
Stephen R. Wheat
Guodong Zhang
Eugene Zima
REGISTRATION
Register now
Fees
What's included?
CONTACTS
Program inquiries
Doug Roberts
519.661.2111 x81229
or
Daniel Stubbs
905.525.9140 x27663
Sponsorship or other inquiries
Lindsay Zajac
519.661.2111 x87082
**DEADLINE TO REGISTER: FRIDAY, OCTOBER 8, 2004**
Call for Posters
WORKSHOP OVERVIEW
SHARCNET
makes available a variety of powerful computing systems for use primarily
by researchers located in 11 consortium member
institutions across Ontario and from a broadening platform of scientific
disciplines.
The adoption of SHARCNET, as an high performance computing facility of choice, is being driven by the realization of several factors, including: reduced time to computed solution, the ability to increase problem complexity, ease of accessibility to state of the art facilities, and finally, a much anticipated expansion of SHARCNET's computational infrastructure.
The
2003 SHARCNET Fall Workshop focused on distributed memory programming
using MPI. The 2004
Workshop will focus on SMP systems, and their associated shared memory
programming techniques,
like OpenMP,
as well as feature expert talks on processors such as Opteron, Itanium
and Xeon.
DRIVING DIRECTIONS
From Toronto Pearson International Airport, Toronto, Ontario (Waterloo,
Ontario is approximately one hour west of Toronto): Travel west
on Highway 401, take (exit 278) Highway 8 West to Kitchener; exit onto
the Conestoga Parkway by following the Highway
7 East and Highway 86 North signs and then continue on the Parkway to
75 University Avenue West.)
From Detroit/Windsor (Approximately 3 hours drive): Travel East on Highway 401. Take The Hwy-8 W Exit (278B) toward Kitchener/Waterloo. Take slight right onto King St E/Shantz Hill Rd/Regional Route 8. Continue to follow King St E/Regional Route 8. Take Hwy-8 W Ramp toward Kitchener/Waterloo. Merge onto Provincial Route 8 W. Take Hwy-7 E Exit toward Guelph/Hwy-86/Waterloo. Merge onto Provincial Route 7 E/Conestoga Pkwy. Take Provincial Route 86 N/Conestoga Pkwy toward Waterloo. Take the University Avenue West Exit. Turn slight right onto University Ave E/Regional Route 57. End At 75 University Ave W.
ACCOMMODATIONS
A conference rate ($89 CDN+taxes) has been arranged at the Waterloo
Comfort Inn,
which is within walking distance of the Wilfrid Laurier. Attendees
are responsible for booking their own accommodations. Conference
rate can be secured by citing the "SHARCNET Fall Workshop". Conference
rate is available until September 28 only. Accommodations
are NOT included in workshop registration fees.
PROGRAM*
*subject to change
This
year's workshop will be preceded by a one-day Introduction
to High Performance Programming workshop on Tuesday,
October 12th. Participants in the Fall Workshop are invited to attend
these
bonus sessions at no additional charge. The workshop
instructor will be Edward
Chrzanowski,
a software specialist at the University of Waterloo's Computer Science
Computing Facility (CSCF). The day's program is as follows:
Introduction to High Performance Programming
Tuesday,
October 12 |
|
| 09:00-12:00 | Designing
parallel algorithms - task/channel model - 3 parallel algorithm design paradigms - result - specialist - agenda - BSP - Bulk Synchronous Parallel Model |
| 12:00-13:00 | Lunch |
| 13:00-16:00 | Serial
program tuning - profiling - libraries Parallel programming basics (MPI, OpenMp) |
Wednesday, October 13 |
|
| 09:30-09:45 | Welcome
and Workshop Opening Art Szabo, Dean of Science, WLU Hugh Couchman, Scientific Director, SHARCNET |
| 09:45-10:45 | Using
HPC to Model Microstructure formation in Metal Alloys (Opening Keynote) Nick Provatas, McMaster |
| 10:45-11:00 | Coffee break |
| 11:00-12:00 | The
NAG Library and HPC Mike Dewar, NAG |
| 12:00-13:00 | Lunch |
| 13:00-14:00 | The
Birth of Mammoth Carol Gauthier and Alain Veilleux, U. of Sherbrooke |
| 14:00-14:15 | Coffee break |
| 14:30-15:15 | On
the efficient use of Mammoth |
| 15:15-17:00 | Development
tools for shared memory systems Guodong Zhang & Susanne M. Balle, HP |
| 17:00-18:00 | Opening reception |
Thursday,
October 14 |
|
| 09:00-10:00 | The
quest for scalability: Some tools and approaches |
| 10:00-10:15 | Coffee break |
| 10:15-11:00 | The
quest for scalability: Some tools and approaches (con't) |
| 11:00-12:00 | OpenMP
in the Real World: Experiences in porting a large legacy application
with irregular data access Rob Thacker, Queens U. |
| 12:00-13:00 | Lunch |
| 13:00-14:30 | Cache
Aware Algorithms and PDE Libraries Craig C. Douglas, U. of Kentucky and Yale U. |
| 14:30-14:45 | Coffee break |
| 14:45-15:45 | On
distributed high-precision evaluation of hypergeometric series Eugene Zima, Wilfrid Laurier |
| 15:45-17:00 | Programming
for Opteron architectures Alexandra Bialek, AMD |
Friday,
October 15 |
|
| 09:00-10:00 | The
Problem of Programming High Performance Computers I: -Concepts required to write parallel code and associated difficulties -The good and bad of how we program through models (e.g. PRAM) Brian D'Auriol, U. of Texas at El Paso |
| 10:00-10:15 | Coffee break |
| 10:15-11:00 | The
Problem of Programming High Performance Computers II: -Visual programming and program visualization to facilitate the conceptual transfer of HPC codes -Research topics, including Optical Bus parallel models Brian D'Auriol, U. of Texas at El Paso |
| 11:00-12:30 | Programming
Guidelines: Going from Novice towards Expert on Intel Architecture Stephen Wheat, Intel |
| 12:30-14:30 | Lunch and poster session |
CALL
FOR POSTERS
Research groups from across the SHARCNET community are invited to submit
a poster for the SHARCNET Fall Workshop 2004 under the general theme
of Innovation
in
High Performance
Programming.
Posters should be no larger than 3x4. Poster boards will be supplied.
Participants are expected to supply their own tape or push pins.
Submit
your talk
title with your registration for the workshop,
NO LATER THAN OCTOBER 1, 2004.
Susanne M. Balle, Ph. D.
HPTC SW Environment and Tools Architect
HP
Susanne is currently the HPTC SW Environment and Tools Architect
at Hewlett-Packard. Her work areas are high performance technical
computing, and scalable tools. Earlier in her career, Susanne worked
in areas such as performance prediction for Compaq 21264 microprocessor-based
architectures, memory access pattern analysis, parallel Lanczos algorithms
for solving very large eigenvalue problems, distributed-memory matrix
computations, as well as improving performance of standard industry
and customer benchmarks. Susanne received a Ph.D. in mathematics
and an M.S. in mechanical engineering and computational fluid dynamics
from the Technical University of Denmark.
David "Boris" Cownie
Opteron HPC Benchmarking Engineer
AMD
David started his career at Inmos where he wrote the "Occam" compiler
and
the code generator for the Transputer processor. From there he joined
Meiko, Ltd. as one of the first employees where he worked on many parallel
codes including benchmarks for many large national laboratories -- e.g.
NASA Ames, Lawrence Livermore. He also managed 3rd party compiler and
tools vendors as part of his work at Meiko. Currently David works with
AMD's customers (vendors) and end users of AMD processors on optimization
of HPC applications. David has an MA in computer science from Cambridge University,
UK.
Edward Chrzanowski
Software Specialist
Computer
Science Computing Facility (CSCF)
University of Waterloo
Edward Chrzanowski was educated at University of Waterloo. He is currently a member of the University of Waterloo School of Computer Science Computing Facility (CSCF), where his current research includes adaptive schedulers in HPC.
Brian
J. d'Auriol
Assistant Professor
University of Texas at El Paso
Brian J. d'Auriol received his Ph.D. degree in Computer Science from
the University of New Brunswick, Canada in 1995 and is currently affiliated
with the University of Texas at El Paso. He is the Chair of the annual
International Conference on Communications in Computing (CIC) and was
the Chair of the 11th Annual International Symposium on High Performance
Computing Systems (HPCS'97). Brian is active in many international
conferences and has published a number of papers spanning his research
interests of parallel and distributed computing, program visualization
and computer security. His current research activities relate to models
for parallel and distributed programming with special emphasis on the
co-specification of computations and communication and computation
communication integration. Within this focus, Brian specializes in
program visualization of high performance computing codes, optical
bus parallel computing models and network intrusion detection models.
Brian's work crosses these fields and brings a unique perspective to
better facilitate program development and program comprehension of
high performance computing codes.
Mike Dewar
Senior Technical Consultant
Numerical Algorithms Group (NAG)
Dr Mike Dewar is a Senior Technical Consultant with the
Numerical Algorithms Group (NAG) Ltd, a not-for-profit Company which
has been developing and marketing scientific software since 1970. Currently
he specialises in the development of software architectures for NAG's
library of numerical algorithms, and in mechanisms for embedding those
algorithms in application packages.
Craig
C. Douglas
Professor, Departments of Computer Science and Mechanical Engineering
Associate Director, Center for Computational Sciences
University of Kentucky
&
Senior Research Scientist, Department of Computer Science
Yale University
Dr. Douglas has three appointments at the University of Kentucky and
one in computer science at Yale. He is a numerical analyst by training,
but has evolved into a computational scientist with interests in simulating
contaminant transport, wildland fires, combustion, and ocean circulation.
He is best known for his work in multigrid methods. In particular, he
has run MGNet since its inception in 1991. He holds an B.A. in mathematics
from the University of Chicago and a M.S., M.Phil., and Ph.D. in computer
science from Yale University. After completing his Ph.D., he worked first
at Yale and then at Duke University. He moved to IBM's Thomas J. Watson
Research Center in Yorktown Heights, New York in 1986 and re-acquired
an affiliation with the computer science department at Yale. During his
tenure at IBM, he spent sabbaticals as a visiting professor at Pavia
(Italy) and Yale. For 2 years, he was also a visiting senior at CERFACS
(Toulouse, France) and has been a foreign guest professor at Wuhan University
(Wuhan, P.R. China). His research group is known as ML-DDDAS, which stands
for Multilevel Dynamic Data-Driven Application Simulations. (For more
on DDDAS, please visit the community web site at http://www.dddas.org.)
Dr. Nikolas Provatas
Associate Professor, Materials Science and Engineering
McMaster University
Dr.
Provatas obtained his Ph.D in Physics at McGill University. He then
moved on to the University of Helsonki where, as a postdoctoral
research
fellow, his research examined percolation properties of stochastic
fibre networks, and their application to paper structure. From 1996-1999
he
was a research associate at the department of materials science
and mechanical engineering at the University of Illinois at Urbana-Champaign,
where
his work was funded by the NASA micro-gravity research program
and
was aimed at developing a new AMR code for the efficient simulation
of solidification
microstructure using phase-field models. From 1999-2002 he was
a research scientist at the Pulp and Paper Research Institute
of Canada. There,
he developed a 3D finite-element fibre network model of paper structure.
The model was (and is being) used to predict paper-surface structure
and to diagnose commercial printing problems.
Brian Sumner, Principal Engineer
Performance Engineering
SGI
Dr. Sumner works with customers and software vendors on a wide range of issues related to parallel program performance, scaling, and correctness. Recent examples include: improving the per-cpu and parallel scaling performance of a seismic processing application, improving the parallel scaling of a large dense linear algebra code, analyzing and reducing the performance bottlenecks in a real time remote sensing application, and improving the response times of a web server application.
Dr. Sumner is also the author of a number of demonstration programs
and performance analysis tools for parallel programs for Linux and
IRIX environments. He holds a Ph.D. in Mathematics.
Dr.
Rob Thacker,
Adjunct Assistant Professor, Physics
Queens University
Rob Thacker, CITA National Fellow and Adjunct Assistant Professor of
Physics at Queen's University, uses hydrodynamic simulations to model
the formation and clustering of galaxies in our Universe. The complex
non-linear nature of the galaxy formation process and the large range
in scales inherent in the problem necessitates the use of hundreds, and
occasionally, thousands of processors simultaneously. Thacker is a member
of a number of international cosmology research consortia, and has received
grants from the US DoE, NCSA and NPACI supercomputing centres.
Stephen
R. Wheat, Principal Scientist,
High Performance Computing Program
Intel
Dr. Wheat interacts with the HPC end user community to educate them on Intel architecture and participate with users in architecting complex computing solutions using standard Intel building blocks. Dr. Wheat also acts as an end user advocate on behalf of the HPC end user community to provide feedback into Intel's multiple business units responsible for strategies and product decisions.
Dr. Wheat holds a Ph.D. in Computer Science and has several publications
as papers and conference proceedings on the subjects of load balancing,
inter-process communication, and parallel I/O in large-scale HPC systems.
Guodong
Zhang, Ph.D.
Worldwide Marketing Product Manager
HPTC Group, HP
Guodong is a Worldwide Marketing Product Manager in HP’s High Performance Technical Computing (HPTC) Group. Guodong works in a team that is responsible for HP’s product and solution portfolio for the high performance technical computing community. Guodong is focused on HP’s UNIX products and solution offerings.
Guodong has a wide breadth of experience in HPC ranging from algorithm optimization, software development, and system integration. He was a principle member of the math library team in the early 90’s, and later worked as a senior technical consultant interacting with HP’s partners and customers. Guodong holds a Ph.D. in Applied Math from Leeds University in United Kingdom, and a MBA from Southern Methodist University in Texas.
Dr.Eugene Zima
Associate Professor, Computing
Wilfrid Laurier University
Dr. Zima obtained his PhD in Computer Science from Lomonosov Moscow State University in 1985. Since that time, until 1997, he worked as an assistant professor and associate professor at the Computer Science faculty of Moscow State. From 1997 to 2004, he was a visiting associate professor at the University of Waterloo. He is currently an associate professor at Wilfrid Laurier. Dr. Zima's scientific interests include: Computer Algebra, Symbolic-Numeric Interface, Program Optimization, Parallel Computations, and Programming Technology.
REGISTRATION
Fees
Undergraduate students: $0
Graduate students: $25
Faculty: $50
Private sector: $75
What's included?
-all workshop sessions (plus optional Tuesday introductory session)
-reception
-3 lunches
-daily refreshments
Register
now!
Thank you to our event sponsors:
